VLSI DESIGN & SIGNAL PROCESSING LAB

VLSI DESIGN & SIGNAL PROCESSING LAB is well equipped with the standard VLSI EDA tools and hardware resources. The lab facility includes course lab for course projects, assignments and research. This Lab consists of total 22 good qualities PC with power backup. The focus of this lab is widely spread towards different pros and cons of the entire upgrading VLSI domain and Signal Processing domain. Development works at different levels like digital VLSI simulation, circuits & system design and research in some recent trends like advanced communication systems have been extensively being carried out.

Name of Important Equipments

State-of-art facility for research and teaching at graduate and postgraduate level.

1. EDA Tools under C2S Programme, ChipIN Centre, C-DAC Bangalore.
2. Software tools: Xilinx (version 14.7), Tanner EDA , MATLAB R2023b etc.
3. FPGA prototyping boards and Analog and Digital IO boards (Vertex 5).
4. Networked computing environment with XP and Windows.
5. Various components like resistor, capacitor, inductor and adjustable power supply for practical experiments such as RL, RC, and RLC.

List of Experiments

SIGNALS & NETWORK LAB (EC-393)

1. Introduction to basics of MATLAB.
2. Write a MATLAB program to plot different continuous-time and discrete-time signals.
3. Write a MATLAB program to obtain different functions and plot various signals using functions in MATLAB
4. Evaluation of Convolution integral for continuous and discrete signals using MATLAB
5. Continuous and Discrete Fourier transform for Periodic & non-periodic signals with the help of MATLAB.
6. Determination of Laplace transform and inverse Laplace transformation using MATLAB
7. Representation of poles and zeros in z-plane, determination of partial fraction expansion in z-domain, and cascade connection of a second-order system using MATLAB
8. Characteristics of series and parallel resonant circuits using Hardware.
9. Transient response of R-L and R-C network using Hardware.
10. Transient response of R-L-C series network using Hardware.
11. Determination of Impedance (Z) and Admittance (Y) parameters of two-port network using Hardware.
12. Verification of network theorems using Hardware.

VLSI DESIGN LAB (EC-691)

1. Design and Simulation of Half and Full Adders.
2. Design and Simulation of Half and Full subtractor.
3. Design of MUX/DeMUX circuits.
4. Design of Serial Binary Adder and Ripple Carry Adder.
5. Design of 4-bit binary BCD counters (synchronous/ asynchronous reset).
6. Design of a N-bit shift register of Serial-in Serial-out, Serial-in parallel-out, Parallel-in Serial-out, and Parallel-in Parallel-Out.
7. Design of Sequence Detector (Finite State Machine- Mealy and Moore Machines).
8. Design of 4-bit Multiplier and 4-bit Divider.
9. Design of ALU to Perform ADD, SUB, AND, OR, 1's compliment, 2's Compliment.
10. CMOS Inverter using SPICE simulation.
11. Design of amplifier using SPICE simulation.