ANALOG ELECTRONICS & DESIGN LAB

Analog Electronics & Design LAB was setup in the year 1996 in the department of Electronics and Communication Engineering (ECE).In this Lab, second year and final year students carry out experiments in circuits and electronics featuring diode & transistor circuits, amplifiers, op-amps, wave generators, and digital electronics.

Projects in third year courses and during the final year are also built and tested in this lab. Equipment includes Digital oscilloscopes, digital multimeters, function generators, power supplies.

 Analog Electronics Lab experiment (ECE-394), Circuits Design Lab experiment (ECE-883), and Final Year Projects are instructed in this lab.

The objective of this laboratory is to link the theoretical concepts of different analog electronics circuits with practical feasibility thereby giving them a scope to learn basic electronics circuits and their different electrical characteristics in a better way.

List of the Major Equipments:-

1. General purpose trainer kit
2. Function generator
3. Synthesized Function generator
4. Cathode Ray Oscilloscope (CRO)
5. Digital Storage Oscilloscope (DSO)
6. Digital Multimeter.
7. Voltmeter
8. Active and passive component.

List of the Components:-
       Resistor
       Capacitor
       FET
      Transistor

List of Experiments for Analog electronics &circuit Lab (EC-394)

1. Study of diode as clipper & clamper.
2. Study of Zener diode as a voltage regulator.
3. Study of ripple and regulation characteristics of full wave rectifier without and with capacitive filter.
4. Study of characteristics curve of BJT & FET.
5. Construction of a two stage RC coupled amplifier & study of it’s gain & bandwidth.
6. Study of class A & class B power amplifiers.
7. Study of class C & push pull amplifiers.
8. Realization of current mirror & level shifter circuit using operational amplifier.
9. Study of timer circuit using NE 555& configuration for monostable & astable multivibrator.
10. Construction & study of bistable multivibrator using NE555.
11. Study of switch Mode Power Supply & construction of a linear voltage regulator using regulator IC chip.
12. Construction of a simple function generator using IC.
13. Realization of a V-to-I & I-to-V converter using Op-amps.
14. Realization of a Phase Locked Loop(PLL) using Voltage Controlled Oscilator.
15. Study of DAC & ADC.

 List of Design Problems for Design Lab (EC-883)

      Power supply

1. Design a regulated voltage source (Load current 50mA) using a Zener diode (having test current 20mA) as a simple shunt regulator with simple capacitive filter and    (a) Half wave rectifier circuit (b) Full wave rectifier circuit (c) Bridge rectifier circuit

                      (i) 5V (ii) 7V (iii) 9V (iv) 12 V

2. Design a regulated voltage source (Load current 50mA) using 78XX or 79XX with (a) Half wave rectifier circuit (b) Full wave rectifier circuit (c) Bridge rectifier circuit

                      (i) 5V (ii) (ii) 12 V (iii) -5V    (iv) -12 (v) -15v

3. Design a split power supply using 78XX & 79XX

       (i) +/- 5V      (ii) +/- 12V

      Voltage Amplifier and Oscillator

1. Design a small signal voltage amplifier using a BJT in CE mode in fixed bias with collector current Ic=1mA having voltage gain Av (a) 50 (b) 60 (c) 70 (d) 80 (e) 75 (f) 85 (g) 90 (h) 55 (i) 65 (j) 95

2. Design a small signal voltage amplifier using a BJT in CE mode in self bias with collector current Ic=1mA having voltage gain Av (a) 50 (b) 60 (c) 70 (d) 80 (e) 75 (f) 85 (g) 90 (h) 55 (i) 65 (j) 95

3. Design a Wien bridge oscillator using OPAMP having frequency of oscillation f_osc  (a) 500Hz  (b) 1KHz  (c) 2KHz  (d) 3KHz (e) 1.5KHz (f) 2.5KHz (g) 3.5KHz  

      Filter

1. Design a 1^st order low pass Butterworth filter having cutoff frequency f_c and pass band gain A_v are given below

         (a) f_c = 5KHz,  A_v= 2  (b) f_c = 10KHz,  A_v= 2  (c) f_c = 2KHz,  A_v= 2  (d) f_c = 5KHz,

            A_v= 3  (e) f_c = 10KHz,  A_v= 3   (f) f_c = 2KHz,  A_v= 3 (g) f_c = 5KHz,  A_v= 3

         (h) f_c = 7KHz,  A_v= 2 

2. Design a 1^st order high pass Butterworth filter having cutoff frequency f_c and pass band gain A_v are given below

          (a) f_c = 500Hz,  A_v= 2  (b) f_c = 1KHz,  A_v= 2  (c) f_c = 2KHz,  A_v= 2  (d) f_c = 500Hz, 

           A_v= 3  (e) f_c = 1KHz,  A_v= 3  (f) f_c = 2KHz,  A_v= 3 (g) ) f_c = 3KHz,  A_v= 3

          (h) f_c = 700Hz,  A_v=2

3. Design a 2^nd order low pass Butterworth filter having Av =1.586 cutoff frequency f_c

          (a) f_c = 5KHz (b) f_c = 10KHz (c) f_c = 2KHz (d) f_c = 7KHz(e) f_c = 6KHz(f) f_c = 8KHz      

          (g) f_c = 9KHz(h) f_c = 4KHz

4. Design a 2^nd order high pass Butterworth filter having cutoff frequency f_c

         (a) f_c = 500Hz (b) f_c = 1KHz (c) f_c = 2KHz (d) f_c = 3KHz (e) f_c = 4KHz (f) f_c = 5KHz

         (c) f_c = 6KHz (g) f_c = 7KHz (h) f_c = 8KHz

5. Design a 2^nd order high pass filter having cutoff frequency f_c and pass band gain A_v are given below

           (a) f_c = 2KHz, A_v= 5  (b) f_c = 5KHz, A_v= 3 (c) f_c = 6KHz, A_v= 4 (b) f_c = 3KHz, A_v= 6                                 

      Multivibrator

1. Design an astable multivibrator of output frequency f and duty cycle D are given below

          (a) f = 2KHz, D = 50% (b) f = 2KHz, D = 60% (c) f = 2KHz, D = 70%  (d) f = 1KHz,

          D = 50%   (e) f = 1KHz, D = 60%        (f) f = 1KHz, D = 70%  (g)   f  =   1KHz, 

          D   = 70% (h)   f   =  1KHz,   D  =  70%

2. Design a monostable multivibrator of output pulse width t_p

         (a) 1ms  (b) 2ms  (c) 3ms  (d) 5 ms  (e) 8ms  (f) 10ms (g) 6ms (h) 12ms

       Digital Circuits

1. Design a Synchonous counter using JK Flip flops which follows a sequence

1. 0 – 2 - 4 – 6 -8- 0 – 2 - ………-8
2. 1 – 3 -5 -7- 9- 13 – 1………..- 13
3. 0 – 7 -2 -5 -9 -13-0-…………-13
4. 6 – 3-5-0- 2- 6 -3……………..-2
5. 5 – 3 -7- 9- 13 –1…………..- 13
6. 1 – 7 -2 -5 -9 -0-………………-9

      2. Design a Synchronous counter using JK Flip flops which counts in the sequence

1. 0 – 2 – 4 -6 -0 -2-………….-6 ;
2. 2-4-6-8-2-4-6-8……………..: ;
3. 4-6-8-10-4-6-8-10.

     If the Mode Control unit M=0. During this count if the circuit falls into an Odd Count then it returns to the count Zero.When M = 1, then the count sequence will be

      a)1-3-5-7-1-…….-7.

1. b) 3-5-7-9………..
2. c) 5-7-9-11………

During this count if the circuit falls into an Even  Count  then it returns to the count One.

3. Design and Implement a BCD to Seven Segment Display (CA type) to show
   4. 0,2,4.
   5. 1,3,5.
   6. 2,4,6.
   7. 3,5,7
   8. 4,5,6
   9. 5,6,7.
   10. 0,4,7
   11. 1,5,7

      4. Design a Synchronous counter using JK Flip flops.

1. Mod6
2. Mod4
3. Mod5
4. Mod7
5. Mod8
6. Mod9
7. Mod11
8. Mod12
9. Mod13