Dr. Bishnu Prasad De

Designation : Assistant Professor

Phone No. :
Email : bishnu.ece@gmail.com

 

Contact Details : 

Education

Ph.D. (NIT-Durgapur)

M.Tech in VLSI DESIGN (IIEST, Shibpur)

B.Tech in ECE (JALPAIGURI GOVT. ENGG. COLLEGE)

 

 

Skills

Technical:

Other Skills:

Experience
  • Teaching:  7 years teaching experience
  • Research:  2 years (part time)
  • Industry:  NA

 

Course Taught

Odd Semester 2015-16

Microelectronics & VLSI Designs (EC-702)

Course Home

VLSI Design Lab (EC-792)

Course Home

VLSI Device & Modelling (MVLSI-102)

Course Home

Even Semester 2015-16

Basic Electrical and Electronics engg.-II (ES-201)

Course Home

Basic Electronics engg. -II Lab (ES-291)

Course Home

Low Power VLSI Design (MVLSI-205B)

Course Home

 
Areas of Research

VLSI CIRCUITS & SYSTEMS, ANALOG ELECTRONICS, ELECTRONIC DESIGN AUTOMATION, SOFT COMPUTING

Membership of Professional Bodies
Publications

Journals:

[1]

B. P. De, R. Kar, D. Mandal and S. P. Ghoshal, “Soft Computing based Approach for Optimal  Design Of  On-Chip  Comparator  and  Folded-Cascode  Op-Amp  Using  Colliding Bodies Optimization”, International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, Wiley, DOI 10.1002/jnm.2152, pp. 1-24, 2016. (SCI, IF-0.615)

[2]

B. P. De, R. Kar, D. Mandal and S. P. Ghoshal, “An Efficient Design of CMOS Comparator and  Folded Cascode Op-Amp Circuits using Particle Swarm Optimization with an Aging Leader and Challengers Algorithm”, International Journal of Machine Learning and Cybernetics, Springer, vol. 7, no. 2, pp. 325-344, 2016.  (SCIE)

[3]

B. P. De, R. Kar, D. Mandal and S. P. Ghoshal, “PSO with Aging Leader and Challengers for Optimal Design of High Speed Symmetric Switching CMOS Inverter”, International Journal of Machine Learning and Cybernetics, Springer, DOI 10.1007/s13042-016-0517-z, pp. 1-20, 2016. (SCIE)

[4]

B. P. De, R. Kar, D. Mandal and S. P. Ghoshal, “Optimal Design of High Speed Symmetric Switching CMOS Inverter using Hybrid Harmony Search with Differential Evolution”, Soft Computing, Springer, DOI 10.1007/s00500-015-1731-4, pp.1-19, 2015. (SCIE, IF-1.271)

[5]

B. P. De, R. Kar, D. Mandal and  S. P. Ghoshal, “Particle Swarm Optimization with Aging Leader and Challengers for Optimal Design of Analog Active Filters”, Circuits, Systems & Signal Processing, Springer, vol. 34, no. 3, pp. 707-737, 2015. (SCIE, IF-1.118)

[6]

B.P. De, R. Kar, D. Mandal and S. P. Ghoshal, “Optimal Analog Active Filter Design Using Craziness based Particle Swarm Optimization Algorithm”, International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, Wiley, vol. 28, no. 5, pp. 593-609, 2015. (SCI, IF-0.615)

[7]

B. P. De, R. Kar, D. Mandal and  S. P. Ghoshal, “Optimal CMOS Inverter Design using Differential Evolution Algorithm”, Journal of Electrical Systems and Information Technology, Elsevier, vol. 2, issue 2, pp. 219-241, 2015.

[8]

B. P. De, R. Kar, D. Mandal and S. P. Ghoshal, “Optimal High Speed CMOS Inverter Design Using Craziness based Particle Swarm Optimization Algorithm”, Open Engineering, vol. 5, no. 1, pp. 256-273, 2015.

[9]

B. P. De, R. Kar, D. Mandal and S. P. Ghoshal, “Design of Optimal CMOS Inverter for Symmetric Switching Characteristics Using Firefly with Wavelet Mutation Algorithm”, International Journal of Swarm Intelligence Research, vol. 5, issue 2, pp. 29-64, 2014, IGI Global

[10]

B.P. De, R. Kar, D. Mandal and S. P. Ghoshal, “Optimal Selection of Components Value for Analog Active Filter Design Using Simplex Particle Swarm Optimization”, International Journal of Machine Learning and Cybernetics, Springer, vol. 6, no. 4, pp. 621-636, 2015. (SCIE)

Conferences:

[1]

B. P. De, R. Kar, D. Mandal and  S. P. Ghoshal, ":Design of Symmetric Switching CMOS Inverter using PSOCFIWA", Proc. IEEE ICCSP 2014, pp. 1818-1824, 3-5 April 2014, Melmaruvathur, Tamil Nadu, India.

Books:

Nil
Guided Projects B.Tech/ M.Tech/ Ph.D

B.Tech

 

 

 

 

Sponsored Projects/Grants
Nil